Initial Commit and Notes from HS24

2025-02-24 08:06:04 +01:00
parent 2475ac9866
commit 1a445ee6fe
898 changed files with 24179 additions and 1 deletions
--- a/zusammenfassung/digitaltechnik/sections/cmos.tex
+++ b/zusammenfassung/digitaltechnik/sections/cmos.tex
@@ -0,0 +1,134 @@
+\section{CMOS Gatter}
+
+High Pegel ''H'': 0.9-0.7V \qquad Low Pegel ''L'': 0.15-0V \medskip
+
+\begin{minipage}{0.48\linewidth}
+	\subsubsection{NMOS}
+	\begin{center}
+		\begin{circuitikz}[european]
+			\node[circ, label=90:{\small $V_{DD} = 0.8 \si{\volt}$}](origin) at (0,0) {};
+			\node[thick, nmos, anchor=D] (nmos1) at(0, -2) {}
+			(nmos1.gate) node[anchor=east] {G}
+			(nmos1.drain) node[anchor=west, yshift=-0.15cm] {D}
+			(nmos1.source) node[anchor=west,yshift=+0.15cm] {S};
+			\draw[thick]
+			(origin)
+			to[R=$R$] (0,-1.8) node[circ] (ybase) {}
+			to[] (0, -2);
+
+
+			\draw[thick] (nmos1.S) -- (0, -4) coordinate(gnd);
+
+			\path[draw] (ybase) --++(right:10mm) node[point, label=0:Y] {};
+			\path[draw, very thick] (-0.25, -4) -- (gnd) -- (0.25, -4);
+		\end{circuitikz} \medskip
+
+		\begin{tabular}{c|c|c}
+			G & Schalter & Y \\
+			\hline
+			0 & offen    & 1 \\
+			1 & zu       & 0
+		\end{tabular}
+	\end{center}
+\end{minipage}
+\vline
+\begin{minipage}{0.48\linewidth}
+	\subsubsection{PMOS}
+	\begin{center}
+		\begin{circuitikz}[european]
+			\coordinate (gnd) at (0, -4);
+			\node[circ, label=90:{\small $V_{DD} = 0.8 \si{\volt}$}] (vdd) at (0,0) {};
+			\node[pmos, thick] (pmos) at (0, -1){}
+			(pmos.gate) node[anchor=east] {G}
+			(pmos.source) node[anchor=west,yshift=-0.15cm] {S}
+			(pmos.drain) node[anchor=west, yshift=+0.15cm] {D};
+
+			\draw[thick] (gnd)
+			to[R=$R$] (0, -2)
+			-- (0, -2) node[circ] (ybase) {}
+			-- (pmos.D);
+
+			\draw[thick] (pmos.S) -- (vdd);
+
+			\path[draw] (ybase) --++(right:10mm) node[point, label=0:Y] {};
+			\path[draw, very thick] (-0.25, -4) -- (gnd) -- (0.25, -4);
+		\end{circuitikz} \medskip
+
+		\begin{tabular}{c|c|c}
+			G & Schalter & Y \\
+			\hline
+			0 & zu       & 1 \\
+			1 & offen    & 0
+		\end{tabular}
+	\end{center}
+\end{minipage} \medskip
+
+
+Zustand NN: Potential an Source unbestimmt, ''free floating''
+
+
+\subsection{Konstruktion von CMOS-Gatter}
+
+CMOS-Gatter benötigen \emph{pro} Eingang 1 NMOS + 1 PMOS. \medskip
+
+Sie bestehen aus zwei ergänzenden Schaltungsteilen:
+
+\begin{center}
+	\begin{minipage}{0.3\linewidth}
+		\begin{center}
+			\begin{tikzpicture}
+				\node[circ, label=90:{\small $V_{DD} = 0.8 \si{\volt}$}] at (0,0) (origin) {};
+				\node[draw, dotted](pmos) at(0,-0.5) {PMOS};
+				\node[draw, dotted](nmos) at (0, -1.5) {NMOS};
+				\coordinate(gnd) at (0, -2){};
+				\draw[] (origin) -- (pmos)
+				(pmos) -- (nmos)
+				(nmos) -- (gnd);
+				\path[draw] (0,-1) --++(right:5mm) node[fill = white] {Y};
+				\path[draw, thick] (-0.25, -2) -- (gnd) -- (0.25, -2);
+			\end{tikzpicture}
+		\end{center}
+	\end{minipage}
+	\begin{minipage}{0.55\linewidth}
+		\begin{flushleft}
+			\begin{tabular}{l l}
+				Pull-u\textcolor{red}{p} Schaltung:   & \textcolor{red}{P}MOS \\
+				Pull-dow\textcolor{red}{n} Schaltung: & \textcolor{red}{N}MOS \\
+			\end{tabular}
+		\end{flushleft}
+	\end{minipage}
+\end{center}
+
+\subsubsection{Funktionsgleichung CMOS-Gatter}
+
+\begin{tabular}{l l l}
+	Pull-Up:   & $Y_{\text{pu}} = 1$ & Eingänge Invertiert       \\
+	Pull-Down: & $Y_{\text{pd}} = 0$ & Eingänge nicht Invertiert \\
+\end{tabular}
+
+\begin{center}
+	\eqbox{$Y_{\text{pu}} = \overbrace{\underbrace{(\not{A} \land \not{B})}_{\text{Seriell} } \lor \not{C}}^{\text{Paralell} } \quad \Leftrightarrow \quad$
+	$Y_{\text{pd}} = \overbrace{\overline{\underbrace{(A \lor B)}_{\text{Paralell} } \land C}}^{\text{Seriell} }$}
+
+	\includegraphics[width = 0.32\textwidth]{images/pnmosDetConv.png}
+\end{center}
+
+
+\subsubsection{Umwandlung zwischen Pull-up und Pull-down}
+
+\begin{enumerate}
+	\item Schaltung in Parallele und Serielle Blöcke zerlegen
+	\item Umwandeln: Parallele $\rightleftharpoons$ Serielle Blöcke
+	\item 1),2) wiederholen bis einzelnen Transistoren übrig sind
+	\item Umwandeln: PMOS $\rightleftharpoons$ NMOS
+	\item Schaltungstyp entsprechend Y, GND bzw. VDD setzen
+\end{enumerate} \medskip
+
+\includegraphics[width = 0.3\textwidth]{images/PU_to_PD.jpg}
+\vfill
+
+\subsection{Zeitverhalten CMOS Gatter}
+
+\includegraphics[width = 0.32\textwidth]{images/Laufzeit.jpg}
+
+Durchschnittliche Verzögerung: \eqbox{$t_d = \dfrac{t_{pHL} + t_{pLH}}{2}$}